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1 typical a pplica t ion fea t ures descrip t ion 42v, 2a/3a peak synchronous step-down regulator with 2.5a quiescent curr ent the lt ? 8609s is a compact, high efficiency, high speed synchronous monolithic step-down switching regulator that consumes only 1.7a of non-switching quiescent current. the lt8609 s can deliver 2a of continuous cur - rent with peak loads of 3a (< 1sec) to support applications such as gsm transceivers which require high transient loads. top and bottom power switches are included with all necessary circuitry to minimize the need for external components. low ripple burst mode operation enables high efficiency down to very low output currents while keeping the output ripple below 10mv p-p . a sync pin allows synchronization to an external clock, or spread spectrum modulation of switching frequencies for low emi operation. internal compensation with peak current mode topology allows the use of small inductors and results in fast transient response and good loop stability. the en/uv pin has an accurate 1v threshold and can be used to program v in undervoltage lockout or to shut down the lt8609 s reducing the input supply current to 1a. a capacitor on the tr/ss pin programs the output voltage ramp rate during start-up while the pg flag signals when v out is within 8.5% of the programmed output voltage as well as fault conditions . the lt8609 s is available in a small 16-lead 3mm 3mm lqfn package. a pplica t ions n silent switcher ? 2 architecture n ultralow emi/emc emissions on any pcb n eliminates pcb layout sensitivity n internal bypass capacitors reduce radiated emi n optional spread spectrum modulation n wide input voltage range: 3.0v to 42v n ultralow quiescent current burst mode ? operation: n <2.5a i q regulating 12v in to 3.3v out n output ripple <10mv p-p n high effciency 2mhz synchronous operation: n >93% efficiency at 1a, 12v in to 5v out n 2a maximum continuous output, 3a peak transient output n fast minimum switch-on time: 45ns n adjustable and synchronizable: 200khz to 2.2mhz n allows use of small inductors n low dropout n peak current mode operation n internal compensation n output soft-start and tracking n small 16-lead 3mm 3mm lqfn package n general purpose step down n low emi step down l, lt , lt c , lt m , linear technology, the linear logo, burst mode and silent switcher are registered trademarks of analog devices, inc. all other trademarks are the property of their respective owners. v in en/uv on off 22f 10pf 4.7f v in 5.5v to 40v 1f v out 5v 2a 182k 8609s ta01a 2.2h 1m sync intv cc tr/ss rt LT8609S gnd sw pg fb 18.2k 5v, 2mhz step down 12v in to 5v out efficiency i out (a) 0 efficiency (%) 100 65 90 70 55 85 80 60 95 75 50 1.50 8609s ta01b 2.50 2.00 1.00 0.50 f sw = 2mhz LT8609S 8609sf for more information www.linear.com/LT8609S
2 p in c on f igura t ion a bsolu t e maxi m u m r a t ings v in , en / uv , pg .......................................................... 42 v fb , tr /ss . ................................................................. 4v s ync voltage . ............................................................ 6v o perating junction temperature range ( note 2 ) lt 8609 se .............................................. C 40 to 125c lt 8609 si ............................................... C 40 to 125c storage temperature range ...................... C 65 to 150c maximum reflow ( package body ) temperature ...................................................... 26 0 c (note 1) 12 11 10 9 n/c rt v cc gnd gnd n/c n/c pg en/uv v in v in n/c sw sw n/c gnd sync tr/ss gnd fb 1 2 3 4 16 15 14 13 5 6 7 8 top view lqfn package 16-lead (3mm 3mm) lqfn 17 gnd ja = 52.5c/w exposed pad (pin 17) is gnd, must be soldered to pcb o r d er i n f or m a t ion part number part marking* finish code pad finish package type** msl rating temperature range LT8609Sev#pbf lgyn e4 au (rohs) lqfn (laminate package with qfn footprint 3 C40c to 125c LT8609Siv#pbf lgyn C40c to 125c consult marketing for parts specified with wider operating temperature ranges. * the temperature grade is identified by a label on the shipping container . ? pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part marking, go to: http://www.linear.com/leadfree/ ? recommended pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? package and tray drawings: www.linear.com/packaging ? parts ending with pbf are rohs and weee compliant. ** the LT8609S package has the same footprint as a standard 3mm 3mm qfn package. http://www .linear.com/product/lt8609#orderinfo LT8609S 8609sf for more information www.linear.com/LT8609S
3 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the LT8609Se is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the LT8609Si is guaranteed over the full C40c to 125c operating junction temperature range. note 3: this ic includes overtemperature protection that is intended to protect the device during overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature will reduce lifetime. parameter conditions min typ max units minimum input voltage l 2.7 3 .0 3.2 v v in quiescent current v en/uv = 0v, v sync = 0v v en/uv = 2v, not switching, v sync = 0v, v in 36v l 1 1.7 5 12 a a v in current in regulation v in = 6v, v out = 2.7v, output load = 100a v in = 6v, v out = 2.7v, output load = 1ma l l 46 480 90 700 a a feedback reference voltage v in = 6v, i load = 100ma v in = 6v, i load = 100ma l 0.770 0.758 0 .774 0.774 0.778 0.794 v v feedback voltage line regulation v in = 4.0v to 40v l 0.02 0.06 %/v feedback pin input current v fb = 1v l 20 na minimum on-time i load = 1.5a, sync = 0v i load = 1.5a, sync = 1.9v l l 45 45 75 60 ns ns minimum off t ime 115 ns oscillator frequency r fset = 221k, i load = 0.5a r fset = 60.4k, i load = 0.5a r fset = 18.2k, i load = 0.5a l l l 155 640 1.925 200 700 2.00 245 760 2.075 khz khz mhz t op power nmos on-resistance i load = 1a 185 m top power nmos current limit l 3.4 4.75 5.7 a bottom power nmos on-resistance 115 m sw leakage current v in = 42v, v sw = 40v 5 a en/uv pin threshold en/uv rising l 0.99 1.05 1.11 v en/uv pin hysteresis 50 mv en/uv pin current v en/uv = 2v l 20 na pg upper threshold offset from v fb v fb rising l 5.0 8.5 13.0 % pg lower threshold offset from v fb v fb falling l 5.0 8.5 13.0 % pg hysteresis 0.5 % pg leakage v pg = 42v l 200 na pg pull-down resistance v pg = 0.1v 550 1200 sync low input voltage l 0.4 0.9 v sync high input voltage intv cc = 3.5v l 2.7 3.2 v tr/ss source current l 1 2 3 a tr/ss pull-down resistance fault condition, tr/ss = 0.1v 300 900 spread spectrum modulation frequency v sync = 3.3v 0.5 3 6 khz LT8609S 8609sf for more information www.linear.com/LT8609S
4 efficiency (3.3v output, 2mhz, burst mode operation) efficiency (3.3v output, 2mhz, burst mode operation) efficiency (5v output, 2mhz, burst mode operation) efficiency (5v output, 2mhz, burst mode operation) fb voltage load regulation line regulation no-load supply current (3.3v output) v in = 12v v out = 3.3v i load = 1a v in (v) 0 i in (a) 5.0 1.5 4.0 2.0 0.5 3.5 3.0 1.0 4.5 2.5 0.0 30 8609s g08 50 40 2010 v in = 12v v out = 3.3v typical p er f or m ance c harac t eris t ics no-load supply current vs temperature (not switching) LT8609S 8609sf for more information www.linear.com/LT8609S 1 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 input current (a) 10 8609s g09 f sw = 2mhz v in = 12v v in = 24v l = 2.2h i out (a) 0.0 0.5 1.0 1.5 100 2.0 2.5 3 50 55 60 65 70 75 80 1k 85 90 95 100 efficiency (%) 8609s g01 f sw = 2mhz v in = 12v v in = 24v l = 2.2h 10k i out (ma) 0.001 0.01 0.1 1 10 100 1k 10k 0 0 10 20 30 40 50 60 70 80 90 100 10 efficiency (%) 8609s g02 f sw = 2mhz v in = 12v v in = 24v l = 2.2h i out (a) 0.0 0.5 1.0 20 1.5 2.0 2.5 3 50 55 60 65 70 75 30 80 85 90 95 100 efficiency (%) 8609s g03 40 f sw = 2mhz 50 60 70 80 90 100 efficiency (%) 8609s g04 temperature (c) ?50 v in = 12v ?10 30 70 110 150 768.0 769.0 770.0 771.0 772.0 v in = 24v 773.0 774.0 775.0 776.0 777.0 778.0 fb regulation voltage (mv) 8609s g05 output current (a) 0.0 l = 2.2h 0.25 0.5 0.75 1.0 1.25 1.5 1.75 2.0 2.25 2.5 i out (ma) ?0.50 ?0.40 ?0.30 ?0.20 ?0.10 0.00 0.10 0.20 0.30 0.40 0.001 0.50 change in v out (%) 8609s g06 input voltage (v) 4.0 11.6 19.2 26.8 34.4 42.0 0.01 ?0.20 ?0.15 ?0.10 ?0.05 0.00 0.05 0.10 0.15 0.20 change in v out (%) 0.1 8609s g07 temperature (c) ?50 ?10 30 70 110 150 1.3 1.5
5 typical p er f or m ance c harac t eris t ics top fet current limit vs duty cycle top fet current limit vs temperature v in = 6v i load = 1a switch drop vs temperature switch drop vs switch current minimum on-time vs temperature minimum off-time vs temperature dropout voltage vs load current switching frequency vs temperature load current (a) 0 dropout voltage (mv) 800 200 700 300 600 500 100 400 0 1.5 8609s g16 3 1 2.52 0.5 LT8609S 8609sf for more information www.linear.com/LT8609S 30 20 30 40 50 60 70 minimum on-time (ns) 8609s g14 temperature (c) ?50 50 ?30 ?10 10 30 50 70 90 110 130 150 70 50 60 70 80 90 100 110 120 130 140 90 150 minimum off?time (ns) 8609s g15 r t = 18.2k temperature (c) ?50 ?30 ?10 10 30 110 50 70 90 110 130 150 1.975 1.980 1.985 1.990 130 1.995 2.000 2.005 swithcing frequency (mhz) 8609s g17 150 0 50 100 switch current = 1a 150 200 250 300 350 switch drop (mv) 8609s g12 duty cycle (%) 0 20 top sw 40 60 80 100 3.50 3.75 4.00 4.25 4.50 4.75 bot sw 5.00 5.25 5.50 top fet current limit (a) 8609s g10 temperature (c) ?50 ?10 30 70 temperature (c) 110 150 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 ?50 5.0 i sw (a) 8609s g11 top sw bot sw switch current (a) 0 0.5 1 1.5 ?30 2 2.5 3 0 100 200 300 400 500 600 ?10 700 800 switch drop (mv) 8609s g13 sync = 2v, 1.5a out sync = 0v, 1.5a out temperature (c) ?50 ?30 ?10 10 10 30 50 70 90 110 130 150 0 10
6 typical p er f or m ance c harac t eris t ics burst frequency vs load current minimum load to full frequency (sync float to 1.9v) frequency foldback soft-start tracking soft-start current vs temperature v in uvlo load current (ma) 0 frequency (khz) 2500 1000 1500 500 2000 0 600 200 400 l = 2.2h v out = 3.3v v in = 12v sync = 0v 8609s g18 input voltage (v) 8609s g19 0 load current (ma) 100 40 60 20 80 90 30 50 10 70 0 30 50 20 40 10 v out = 5v f sw = 700khz sync = float fb voltage (v) 0 frequency (khz) 2500 1000 1500 500 2000 0 1 0.4 0.8 0.2 0.6 8609s g20 v in = 12v v out = 3.3v sync = 0v v ss = 0.1v temperature (c) ?55 v in uvlo (v) 3.5 1 2 1.5 2.5 0.5 3 0 155 5 125 ?25 6535 95 8609s g23 switching waveforms switching waveforms switching waveforms 2s/div 8609s g25 i l 200ma /div v sw 5v/div 12v in to 5v out at 25ma sync = 0 (burst mode operation) 200ns/div 8609s g26 36v in to 5v out at 1a i l 500ma /div v sw 10v/div 200ns/div i l 500ma /div v sw 5v/div 8609s g24 12v in to 5v out at 1a LT8609S 8609sf for more information www.linear.com/LT8609S 0.8 1.0 1.1 1.2 0 0.1 0.2 0.3 0.4 0.5 ss voltage (v) 0.6 0.7 0.8 0.9 1.0 fb voltage (v) 8609s g21 temperature (c) ?50 ?30 0 ?10 10 30 50 70 90 110 130 150 1.5 0.1 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 0.2 soft start current (a) 8609s g22 0.4 0.5 0.6 0.7
7 typical p er f or m ance c harac t eris t ics transient response transient response case temperature vs 3a pulsed load start-up dropout start-up dropout case temperature vs load current v out = 5v f sw = 2mhz standby load = 50ma pulsed load = 3a v out = 5v f sw = 2mhz 50s/div 500ma /div 100mv/div 8609s g27 50ma to 1a transient 12v in to 5v out c out = 47f 20s/div 500ma /div 100mv/div 8609s g28 0.5a to 1.5a transient 12v in to 5v out c out = 47f LT8609S 8609sf for more information www.linear.com/LT8609S 4 5 6 7 input voltage (v) output voltage (v) 8609s g29 5 6 7 0 1 2 3 4 5 v in 6 7 0 1 2 3 4 5 6 7 v out input voltage (v) output voltage (v) 8609s g30 load current (a) 0 0.25 0.50 0.75 1 1.25 r load = 2.5 1.50 1.75 2 0 10 20 30 40 50 60 input voltage (v) case temperature rise (c) 8609s g31 v in = 12v v in = 24v duty cycle (%) 0 10 20 30 40 50 0 60 70 80 90 100 0 10 20 30 40 1 50 60 case temperature rise (c) 8609s g32 v in = 12v v in = 24v v in v out r load = 25 input voltage (v) 0 2 1 2 3 4 5 6 7 0 1 2 3 3 4 5 6 7 0 1 2 3 4
8 frequency (mhz) 0 amplitude (dbv) 80 ?10 70 50 30 10 60 40 20 0 ?20 15 27 9 21 8609s g33 30 12 24 6 18 3 peak detector class 5 peak limit fixed frequency spread spectrum mode dc2522a demo board with emi filter installed 14v input to 5v output at 2a, f sw = 2mhz conducted emi performance typical p er f or m ance c harac t eris t ics LT8609S 8609sf for more information www.linear.com/LT8609S
9 radiated emi performance (cispr25 radiated emission test with class 5 peak limits) frequency (mhz) 0 amplitude (dbv/m) 50 ?5 45 35 25 5 40 30 15 10 20 0 ?10 500 900 300 700 8609s g34 1000 400 800 200 600 100 frequency (mhz) 0 amplitude (dbv/m) 50 ?5 45 35 25 5 40 30 15 10 20 0 ?10 500 900 300 700 1000 400 800 200 600 100 horizontal polarization peak detector vertical polarization peak detector class 5 peak limit fixed frequency spread spectrum mode class 5 peak limit fixed frequency spread spectrum mode dc2522a demo board with emi filter installed 14v input to 5v output at 2a, f sw = 2mhz typical p er f or m ance c harac t eris t ics LT8609S 8609sf for more information www.linear.com/LT8609S
10 p in func t ions rt (pin 1): a resistor is tied between rt and ground to set the switching frequency. intv cc ( pin 2): internal 3.5v regulator bypass pin. the internal power drivers and control circuits are powered from this voltage. intv cc max output current is 20ma. voltage on intv cc will vary between 2.8v and 3.5v. de- couple this pin to power ground with at least a 1f low esr ceramic capacitor . do not load the intv cc pin with external circuitry. gnd ( pins 3, 4, 8, 14, 17): exposed pad pin. these pads must be connected to the negative terminal of the input capacitor and soldered to the pcb in order to lower the thermal resistance. sw ( pins 5, 6): the sw pin is the output of the internal power switches. connect this pin to the inductor and boost capacitor. this node should be kept small on the pcb for good performance. n/c ( corner pins, pin 7): connect these pins to the ground plane for improved mechanical performance while temperature cycling. v in ( pins 9, 10): the v in pin supplies current to the LT8609S internal circuitry and to the internal topside power switch . this pin must be locally bypassed. be sure to place the positive terminal of the input capacitor as close as pos - sible to the v in pins, and the negative capacitor terminal as close as possible to the gnd pins. en/uv ( pin 11): the LT8609S is shut down when this pin is low and active when this pin is high. the hysteretic threshold voltage is 1.05v going up and 1.00v going down. tie to v in if the shutdown feature is not used. an external resistor divider from v in can be used to program a v in threshold below which the LT8609S will shut down. pg ( pin 12): the pg pin is the open-drain output of an internal comparator. pg remains low until the fb pin is within 8.5% of the final regulation voltage, and there are no fault conditions . pg is valid when v in is above 3.2v and en/uv is high. pg will pull low when v in is above 3.2v and en/uv is low. pg will be high impedance when v in is low. fb ( pin 13): the LT8609S regulates the fb pin to 0.774v. connect the feedback resistor divider tap to this pin. tr/ss ( pin 15 ): output tracking and soft-start pin. this pin allows user control of output voltage ramp rate during start-up. a tr/ ss voltage below 0. 774v forces the LT8609S to regulate the fb pin to equal the tr/ss pin voltage. when tr/ss is above 0.774v, the tracking function is disabled and the internal reference resumes control of the error amplifier. an internal 2 a pull-up current from intv cc on this pin allows a capacitor to program output voltage slew rate. this pin is pulled to ground with a 300 mosfet during shutdown and fault conditions ; use a series resistor if driving from a low impedance output. sync ( pin 16): external clock synchronization input. ground this pin for low ripple burst mode operation at low output loads . tie to a clock source for synchronization to an external frequency. leave floating for pulse-skipping mode with no spread spectrum modulation. tie to intv cc or tie to a voltage between 3. 2v and 5. 0v for pulse-skipping mode with spread spectrum modulation. when in pulse- skipping mode, the i q will increase to several ma. LT8609S 8609sf for more information www.linear.com/LT8609S
11 b lock diagra m 8609s bd + + ? + ? slope comp internal 0.774v ref oscillator 200khz to 2.2mhz burst detect 3.5v reg m1 m2 c bst c out v out sw l switch logic and anti- shoot through error amp shdn 8.5% v c shdn tsd intv cc uvlo v in uvlo shdn tsd v in uvlo en/uv 1v + ? intv cc gnd pg fb r1 r2 r t c ss v out tr/ss 2a rt sync v in v in c in 0.2f 0.1f c vcc r3 opt r4 opt LT8609S 8609sf for more information www.linear.com/LT8609S
12 o pera t ion the lt8609 s is a monolithic constant frequency current mode step-down dc/dc converter. an oscillator with frequency set using a resistor on the rt pin turns on the internal top power switch at the beginning of each clock cycle . current in the inductor then increases until the top switch current comparator trips and turns off the top power switch. the peak inductor current at which the top switch turns off is controlled by the voltage on the internal vc node. the error amplifier servos the vc node by comparing the voltage on the v fb pin with an internal 0.774v reference. when the load current increases it causes a reduction in the feedback voltage relative to the reference leading the error amplifier to raise the vc volt - age until the average inductor current matches the new load current . when the top power switch turns off the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero . if overload conditions result in excess current flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level. if the en/uv pin is low, the LT8609S is shut down and draws 1a from the input . when the en/ uv pin is above 1v, the switching regulator becomes active. to optimize efficiency at light loads , the LT8609S enters burst mode operation during light load situations. between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 1.7a. in a typical application, 2.5a will be consumed from the input supply when regulating with no load. the sync pin is tied low to use burst mode operation and can be floated to use pulse-skipping mode . if a clock is applied to the sync pin the part will synchronize to an external clock frequency and operate in pulse-skipping mode. while in pulse-skipping mode the oscillator oper - ates continuously and positive sw transitions are aligned to the clock. during light loads, switch pulses are skipped to regulate the output and the quiescent current will be several ma. the sync pin may be tied high for spread spectrum modulation mode, and the LT8609S will oper - ate similar to pulse-skipping mode but vary the clock frequency to reduce emi . comparators monitoring the fb pin voltage will pull the pg pin low if the output voltage varies more than 8.5% ( typical) from the set point, or if a fault condition is present. the oscillator reduces the LT8609Ss operating frequency when the voltage at the fb pin is low. this frequency fold - back helps to control the inductor current when the output voltage is lower than the programmed value which occurs during start-up . when a clock is applied to the sync pin the frequency foldback is disabled. frequency foldback is only enabled when the sync pin is tied to ground. LT8609S 8609sf for more information www.linear.com/LT8609S
13 a pplica t ions i n f or m a t ion achieving ultralow quiescent current to enhance efficiency at light loads , the LT8609S enters into low ripple burst mode operation , which keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and mini - mizing output voltage ripple. in burst mode operation the lt8609 s delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor . while in sleep mode the LT8609S consumes 1.7a. as the output load decreases, the frequency of single cur - rent pulses decreases (see figure 1) and the percentage of time the lt8609 s is in sleep mode increases, resulting in much higher light load efficiency than for typical convert - ers. by maximizing the time between pulses, the converter input voltage (v) 8609s f01b 0 load current (ma) 100 40 60 20 80 90 30 50 10 70 0 30 50 20 40 10 v out = 5v f sw = 700khz sync = float figure 1b. full switching frequency minimum load vs v in in pulse skipping mode figure?2. burst mode operation 2.00s/div 200ma/div 10mv/div 8609s f02 quiescent current approaches 2.5a for a typical application when there is no output load. therefore, to optimize the quiescent current performance at light loads , the current in the feedback resistor divider must be minimized as it appears to the output as load current. while in burst mode operation the current limit of the top switch is approximately 600ma resulting in output voltage ripple shown in figure 2. increasing the output capacitance will decrease the output ripple proportionally. as load ramps upward from zero the switching frequency will increase but only up to the switching frequency programmed by the resistor at the rt pin as shown in table ?1. the output load at which the LT8609S reaches the programmed frequency varies based on input voltage, output voltage, and inductor choice. for some applications it is desirable for the LT8609S to operate in pulse-skipping mode , offering two major differ - ences from burst mode operation. first is the clock stays awake at all times and all switching cycles are aligned to the clock. in this mode much of the internal circuitry is awake at all times, increasing quiescent current to several hundred a. second is that full switching frequency is reached at lower output load than in burst mode operation as shown in figure 1b. to enable pulse-skipping mode the sync pin is floated. to achieve spread spectrum modula - tion with pulse-skipping mode, the sync pin is tied high. while a clock is applied to the sync pin the lt8609 s will also operate in pulse-skipping mode. load current (ma) 0 frequency (khz) 2500 1000 1500 500 2000 0 600 200 400 l = 2.2h v out = 3.3v v in = 12v sync = 0v 8609s f01a figure 1a. sw burst mode frequency vs load LT8609S 8609sf for more information www.linear.com/LT8609S
14 a pplica t ions i n f or m a t ion fb resistor network the output voltage is programmed with a resistor divider between the output and the fb pin. choose the resistor values according to: r1 = r2 v out 0.774v C 1 ? ? ? ? ? ? 1% resistors are recommended to maintain output volt - age accuracy. the total resistance of the fb resistor divider should be selected to be as large as possible when good low load efficiency is desired : the resistor divider generates a small load on the output, which should be minimized to optimize the quiescent current at low loads. when using large fb resistors, a 10pf phase lead capacitor should be connected from v out to fb. setting the switching frequency the lt8609 s uses a constant frequency pwm architecture that can be programmed to switch from 200khz to 2.2mhz by using a resistor tied from the rt pin to ground . a table showing the necessary r t value for a desired switching frequency is in table 1 . when in spread spectrum modu - lation mode, the frequency is modulated upwards of the frequency set by r t . table 1. sw frequency vs r t value f sw (mhz) r t (k) 0.2 221 0.300 143 0.400 110 0.500 86.6 0.600 71.5 0.700 60.4 0.800 52.3 0.900 46.4 1.000 40.2 1.200 33.2 1.400 27.4 1.600 23.7 1.800 20.5 2.000 18.2 2.200 16.2 operating frequency selection and trade-offs selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. the advantage of high frequency operation is that smaller induc - tor and capacitor values may be used . the disadvantages are lower efficiency and a smaller input voltage range . the highest switching frequency (f sw(max) ) for a given application can be calculated as follows: f sw(max) = v out + v sw(bot) t on(min) v in C v sw(top) + v sw(bot) ( ) where v in is the typical input voltage, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.4v, ~0.25v, respectively at max load) and t on(min) is the minimum top switch on-time (see electrical characteristics). this equation shows that slower switch - ing frequency is necessary to accommodate a high v in / v out ratio. for transient operation v in may go as high as the abs max rating regardless of the r t value, however the LT8609S will reduce switching frequency as necessary to maintain control of inductor current to assure safe operation. the lt8609 s is capable of maximum duty cycle of greater than 99%, and the v in to v out dropout is limited by the r ds(on) of the top switch. in this mode the LT8609S skips switch cycles, resulting in a lower switching frequency than programmed by r t . for applications that cannot allow deviation from the pro - grammed switching frequency at low v in /v out ratios use the following formula to set switching frequency: v in(min) = v out + v sw(bot) 1C f sw ? t off(min) C v sw(bot) + v sw(top) where v in(min) is the minimum input voltage without skipped cycles, v out is the output voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.4v, ~0.25v, respectively at max load), f sw is the switching frequency (set by r t ), and t off(min) is the minimum switch off-time. note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle. LT8609S 8609sf for more information www.linear.com/LT8609S
15 a pplica t ions i n f or m a t ion inductor selection and maximum output current the lt8609 s is designed to minimize solution size by al- lowing the inductor to be chosen based on the output load requirements of the application . during overload or short circuit conditions the LT8609S safely tolerates operation with a saturated inductor through the use of a high speed peak-current mode architecture. a good first choice for the inductor value is: l = v out + v sw(bot) f sw where f sw is the switching frequency in mhz, v out is the output voltage, v sw(bot) is the bottom switch drop (~0.25v) and l is the inductor value in h. to avoid overheating and poor efficiency , an inductor must be chosen with an rms current rating that is greater than the maximum expected output load of the application. in addition, the saturation current (typically labeled i sat ) rat- ing of the inductor must be higher than the load current plus 1 /2 of in inductor ripple current: i l(peak) = i load(max) + 1 2 ? l where ?i l is the inductor ripple current as calculated several paragraphs below and i load(max) is the maximum output load for a given application. as a quick example, an application requiring 1a output should use an inductor with an rms rating of greater than 1a and an i sat of greater than 1.3a. to keep the ef- ficiency high, the series resistance (dcr) should be less than 0 .04, and the core material should be intended for high frequency applications. the lt8609 s limits the peak switch current in order to protect the switches and the system from overload faults. the top switch current limit (i lim ) is typically 4.75a at low duty cycles and decreases linearly to 4.0a at d = 0.8. the inductor value must then be sufficient to supply the desired maximum output current (i out(max) ), which is a function of the switch current limit (i lim ) and the ripple current: i out(max) = i lim C ? i l 2 the peak-to-peak ripple current in the inductor can be calculated as follows: ? i l = v out l ? f sw 1C v out v in(max) ? ? ? ? ? ? where f sw is the switching frequency of the LT8609S, and l is the value of the inductor. therefore, the maximum output current that the lt8609 s will deliver depends on the minimum switch current limit , the inductor value, and the input and output voltages. the inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current (i out(max) ) given the switching frequency , and maximum input voltage used in the desired application. the optimum inductor for a given application may differ from the one indicated by this design guide. a larger value inductor provides a higher maximum load current and re - duces the output voltage ripple. for applications requiring smaller load currents, the value of the inductor may be lower and the LT8609S may operate with higher ripple current. this allows use of a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current. the internal circuitry of the lt8609 s is capable of supplying i out(max) up to 3a. thermal limitations of the LT8609S prevent continuous output of 3a loads due to unsafe operating temperatures. in order to ensure safe operat - ing temperature , the average LT8609S current must be kept below 2a, but will allow transient peaks up to 3a or i out(max) . if high average currents cause unsafe heating of the part, the LT8609S will stop switching and indicate a fault condition to protect the internal circuitry. LT8609S 8609sf for more information www.linear.com/LT8609S
16 a pplica t ions i n f or m a t ion for more information about maximum output current and discontinuous operation, see linear technologys application note 44. finally, for duty cycles greater than 50 % (v out /v in > 0.5), a minimum inductance is required to avoid sub-harmonic oscillation. see application note 19. input capacitor bypass the input of the lt8609 s circuit with a ceramic capacitor of x7r or x5r type. y5v types have poor performance over temperature and applied voltage , and should not be used . a 4.7 f to 10 f ceramic capacitor is adequate to bypass the LT8609S and will easily handle the ripple current. note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance , or there is sig - nificant inductance due to long wires or cables, additional bulk capacitance may be necessary . this can be provided with a low performance electrolytic capacitor. step-down regulators draw current from the input sup - ply in pulses with very fast rise and fall times . the input capacitor is required to reduce the resulting voltage ripple at the lt8609 s and to force this very high frequency switching current into a tight local loop, minimizing emi. a 4.7f capacitor is capable of this task, but only if it is placed close to the LT8609S ( see the pcb layout sec - tion). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT8609S. a ceramic input capacitor combined with trace or cable inductance forms a high quality ( under damped) tank circuit . if the lt8609 s circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8609Ss voltage rating. this situation is easily avoided ( see linear technology application note 88). output capacitor and output ripple the output capacitor has two essential functions. along with the inductor , it filters the square wave generated by the LT8609S to produce the dc output. in this role it determines the output ripple, thus low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the LT8609Ss control loop. ceramic capacitors have very low equivalent series resistance (esr) and pro - vide the best ripple performance . a good starting value is: c out = 100 v out ? f sw where f sw is in mhz, and c out is the recommended output capacitance in f. use x5r or x7r types. this choice will provide low output ripple and good transient response . transient performance can be improved with a higher value output capacitor and the addition of a feedforward capacitor placed between v out and fb. increasing the output capacitance will also decrease the output voltage ripple. a lower value of output capacitor can be used to save space and cost but transient performance will suffer and may cause loop instability. see the typical applications in this data sheet for suggested capacitor values. when choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. a physically larger capacitor or one with a higher voltage rating may be required. ceramic capacitors ceramic capacitors are small, robust and have very low esr . however, ceramic capacitors can cause problems when used with the LT8609S due to their piezoelectric nature. when in burst mode operation, the LT8609Ss switching frequency depends on the load current, and at very light loads the lt8609 s can excite the ceramic capacitor at audio LT8609S 8609sf for more information www.linear.com/LT8609S
17 frequencies, generating audible noise. since the LT8609S operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this is unacceptable , use a high performance tantalum or electrolytic capacitor at the output. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT8609S. as previously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. if the lt8609 s circuit is plugged into a live supply , the input voltage can ring to twice its nominal value, possibly exceeding the LT8609Ss rating. this situation is easily avoided ( see linear technology application note 88). enable pin the lt8609 s is in shutdown when the en pin is low and active when the pin is high . the rising threshold of the en comparator is 1.05v, with 50mv of hysteresis. the en pin can be tied to v in if the shutdown feature is not used, or tied to a logic level if shutdown control is required. adding a resistor divider from v in to en programs the LT8609S to regulate the output only when v in is above a desired voltage (see block diagram). typically, this threshold, v in(en) , is used in situations where the input supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source , so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions . the v in(en) threshold prevents the regulator from operating at source voltages where the problems might occur. this threshold can be adjusted by setting the values r3 and r4 such that they satisfy the following equation: v in(en) = r3 r4 + 1 ? ? ? ? ? ? ? 1v a pplica t ions i n f or m a t ion where the LT8609S will remain off until v in is above v in( en) . due to the comparator s hysteresis , switching will not stop until the input falls slightly below v in(en) . when in burst mode operation for light-load currents, the current through the v in(en) resistor network can easily be greater than the supply current consumed by the lt8609 s. therefore, the v in( en) resistors should be large to minimize their effect on efficiency at low loads. intv cc regulator an internal low dropout (ldo) regulator produces the 3.5v supply from v in that powers the drivers and the internal bias circuitry . the intv cc can supply enough current for the LT8609S s circuitry and must be bypassed to ground with a minimum of 1 f ceramic capacitor. good bypassing is necessary to supply the high transient currents required by the power mosfet gate drivers. applications with high input voltage and high switching frequency will increase die temperature because of the higher power dissipation across the ldo . do not connect an external load to the intv cc pin. output voltage tracking and soft-start the lt8609 s allows the user to program its output voltage ramp rate by means of the tr/ss pin. an internal 2a pulls up the tr/ ss pin to intv cc . putting an external capaci - tor on tr / ss enables soft-starting the output to prevent current surge on the input supply . during the soft-start ramp the output voltage will proportionally track the tr/ss pin voltage. for output tracking applications , tr/ ss can be externally driven by another voltage source . from 0v to 0.774v, the tr/ss voltage will override the internal 0.774v reference input to the error amplifier, thus regulat - ing the fb pin voltage to that of tr /ss pin. when tr/ss is above 0.774v, tracking is disabled and the feedback voltage will regulate to the internal reference voltage. LT8609S 8609sf for more information www.linear.com/LT8609S
18 a pplica t ions i n f or m a t ion an active pull-down circuit is connected to the tr /ss pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. fault conditions that clear the soft-start capacitor are the en/uv pin transitioning low, v in voltage falling too low, or thermal shutdown. output power good when the LT8609Ss output voltage is within the 8.5% window of the regulation point, which is a v fb voltage in the range of 0.716v to 0.849v (typical), the output voltage is considered good and the open-drain pg pin goes high impedance and is typically pulled high with an external resistor. otherwise, the internal drain pull-down device will pull the pg pin low. to prevent glitching both the upper and lower thresholds include 0.5% of hysteresis. the pg pin is also actively pulled low during several fault conditions: en/uv pin is below 1v, intv cc has fallen too low, v in is too low, or thermal shutdown. synchronization to select low ripple burst mode operation , tie the sync pin below 0.4v (this can be ground or a logic low output). to synchronize the LT8609S oscillator to an external frequency connect a square wave (with 20% to 80% duty cycle) to the sync pin. the square wave amplitude should have valleys that are below 0.9v and peaks above 2.7v (up to 5v). the lt8609 s will not enter burst mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. the LT8609S may be synchronized over a 200khz to 2.2mhz range. the r t resistor should be chosen to set the LT8609S switching frequency equal to or below the lowest synchro - nization input. for example, if the synchronization signal will be 500khz and higher, the r t should be selected for 500khz. the slope compensation is set by the r t value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage, and output voltage. since the syn - chronization frequency will not change the slopes of the inductor current waveform , if the inductor is large enough to avoid subharmonic oscillations at the frequency set by r t , then the slope compensation will be sufficient for all synchronization frequencies. for some applications it is desirable for the LT8609S to operate in pulse-skipping mode , offering two major differ - ences from burst mode operation. first is the clock stays a w ake at all times and all switching cycles are aligned to the clock. second is that full switching frequency is reached at lower output load than in burst mode operation as shown in figure ?1b in an earlier section. these two differences come at the expense of increased quiescent current. to enable pulse-skipping mode the sync pin is floated. for some applications, reduced emi operation may be desirable, which can be achieved through spread spectrum modulation. this mode operates similar to pulse skipping mode operation, with the key difference that the switching frequency is modulated up and down by a 3 khz triangle wave. the modulation has the frequency set by r t as the low frequency, and modulates up to approximately 20% higher than the frequency set by r t . to enable spread spectrum mode, tie sync to intv cc or drive to a voltage between 3.2v and 5v. the lt8609 s does not operate in forced continuous mode regardless of sync signal. shorted and reversed input protection the lt8609 s will tolerate a shorted output. several fea - tures are used for protection during output short-circuit and brownout conditions . the first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control (only if sync ?=?0v).. second, the bottom switch current LT8609S 8609sf for more information www.linear.com/LT8609S
19 v in v in LT8609S gnd d1 8609s f03 en/uv figure?3. reverse v in protection a pplica t ions i n f or m a t ion pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout . figure 4 shows the recommended component placement with trace, ground plane and via locations . note that large , switched currents flow in the lt8609 s s v in pins, gnd pins, and the input capacitor (c in ). the loop formed by the input capacitor should be as small as possible by placing the capacitor adjacent to the v in and gnd pins. when using a physically large input capacitor the resulting loop may become too large in which case using a small case/ value capacitor placed close to the v in and gnd pins plus a larger capacitor further away is preferred. these com- ponents, along with the inductor and output capacitor , should be placed on the same side of the cir cuit board, and their connections should be made on that layer. place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer . the sw node should be as small as possible. finally, keep the fb and rt nodes small so that the ground traces will shield them from the sw node. the exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also acts as a heat sink thermally . to keep thermal resistance low , extend the ground plane as much as possible, and add thermal vias under and near the lt8609 s to additional ground planes within the circuit board and on the bottom side. for mechanical performance during temperature cycles, solder the corner n/ c pins to the ground plane. thermal considerations and peak current output for higher ambient temperatures, care should be taken in the layout of the pcb to ensure good heat sinking of the LT8609S. the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias ; these layers will spread heat dissipated by the LT8609S. placing additional vias can reduce thermal resistance further. the maximum load current should be derated as the ambient is monitored such that if inductor current is beyond safe levels switching of the top switch will be delayed until such time as the inductor current falls to safe levels. this allows for tailoring the LT8609S to individual applications and limiting thermal dissipation during short circuit conditions . frequency foldback behavior depends on the state of the sync pin: if the sync pin is low or high, or floated the switching frequency will slow while the output voltage is lower than the programmed level. if the sync pin is connected to a clock source , the lt8609 s will stay at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels. there is another situation to consider in systems where the output will be held high when the input to the LT8609S is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the LT8609Ss output. if the v in pin is allowed to float and the en pin is held high ( either by a logic signal or because it is tied to v in ), then the LT8609S s internal circuitry will pull its quies - cent current through its sw pin. this is acceptable if the system can tolerate several a in this state. if the en pin is grounded the sw pin current will drop to near 0.7a. however, if the v in pin is grounded while the output is held high , regardless of en, parasitic body diodes inside the lt8609 s can pull current from the output through the sw pin and the v in pin. figure 3 shows a connection of the v in and en / uv pins that will allow the lt8609 s to run only when the input voltage is present and that protects against a shorted or reversed input. LT8609S 8609sf for more information www.linear.com/LT8609S
20 temperature approaches the maximum junction rating . power dissipation within the lt8609 s can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. the die temperature is calculated by multiplying the LT8609S power dissipation by the thermal resistance from junction to ambient. the LT8609S will stop switching and indicate a fault condition if safe junction temperature is exceeded. temperature rise of the LT8609S is worst when operating at high load, high v in , and high switching frequency. if the case temperature is too high for a given application, then either v in , switching frequency or load current can be decreased to reduce the temperature to an acceptable level. figure? 4 shows how case temperature rise can be managed by reducing v in . the lt8609 s s internal power switches are capable of safely delivering up to 3a of peak output current. however, due to thermal limits, the package can only handle 3a loads for short periods of time. this time is determined by how quickly the case temperature approaches the maximum junction rating. figure? 5 shows an example of how case temperature rise changes with the duty cycle of a 10hz pulsed 3a load. junction temperature will be higher than case temperature. a pplica t ions i n f or m a t ion figure?4. case temperature rise vs load current figure?5. case temperature rise vs 3a pulsed load v out = 5v f sw = 2mhz standby load = 50ma pulsed load = 3a v out = 5v f sw = 2mhz LT8609S 8609sf for more information www.linear.com/LT8609S 1.75 2 0 10 20 30 40 50 60 case temperature rise (c) load current (a) 8609s f04 v in = 12v v in = 24v duty cycle (%) 0 10 20 30 40 50 60 0 70 80 90 100 0 10 20 30 40 50 0.25 60 case temperature rise (c) 8609s f05 v in = 12v v in = 24v 0.50 0.75 1 1.25 1.50
21 typical a pplica t ions 3.3v step down 5v step down 12v step down v out 3.3v 2a 8609s ta02 v out 5v 2a 8609s ta03 v out 12v 2a 8609s ta04 LT8609S 8609sf for more information www.linear.com/LT8609S c6 10nf v in en/uv sync LT8609S intv cc tr/ss rt gnd fb c2 4.7f pg sw v in 3.8v to 42v power good f sw = 2mhz l1 = xfl4020-222me c4 22f x7r 1206 c2 4.7f c3 1f c5 10pf c3 1f l1 2.2h r1 18.2k r2 1m r3 182k r4 100k c6 10nf v in en/uv sync LT8609S c5 10pf intv cc tr/ss rt gnd fb pg sw v in 5v to 42v power good f sw = 2mhz l1 2.2h l1 = xfl4020-222me c4 22f x7r 1206 c2 4.7f c3 1f c4 22f x7r 1206 c5 10pf l1 10h r1 40.2k r2 1m r3 69.8k r1 18.2k r4 100k c6 10nf v in en/uv sync LT8609S intv cc tr/ss rt gnd r2 1m fb pg sw v in 12.5v to 42v power good f sw = 1mhz l1 = xal4040-103me r3 309k r4 100k
22 typical a pplica t ions 1.8v 2mhz step-down converter ultralow emi 3.3v 2a step-down converter v out 1.8v 2a 8609s ta05 p skip m1 nfet v out 3.3v 2a 8609s ta06 LT8609S 8609sf for more information www.linear.com/LT8609S c6 10nf v in en/uv sync LT8609S intv cc tr/ss rt gnd fb c2 4.7f pg sw v in 3.1v to 20v (42v transient) power good f sw = 2mhz l1 = xfl4020-222me c4 47f x7r 1210 c2 4.7f c3 1f c5 10pf c3 1f l1 8.2h r1 110k r2 1m r3 309k r4 100k c6 10nf l2 bead l3 4.7h c7 4.7f c5 10pf c8 4.7f v in en/uv sync LT8609S intv cc tr/ss rt gnd fb l1 2.2h pg sw v in 4v to 40v power good f sw = 400khz l1 = xal4040-822 c9 = os-con 63sxv33m l3 = xal4030-472 c4 47f x7r 1210 c9 33f r1 18.2k r2 1m r3 768k r4 100k
23 information furnished by linear technology corporation is believed to be accurate and reliable . however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights . p ackage descrip t ion please refer to http://www .linear.com/product/lt8609#packaging for the most recent package drawings. lqfn package 16-lead (3mm 3mm 0.94mm) (reference ltc dwg # 05-08-1516 rev b) detail b a package top view 5 pad ?a1? corner y x aaa z 2 16b package bottom view 4 6 see notes e d b 0.375 e e b e1 d1 detail b substrate mold cap // bbb z z h2 h1 detail c suggested pcb layout top view 0.0000 0.0000 0.7500 0.2500 0.2500 0.7500 0.7500 0.2500 0.2500 0.7500 detail a 7 see notes pin 1 notch 0.25 45 13 16 8 5 1 4 12 9 aaa z 2 m x yzccc m x yzccc m x yzeee m z fff package outline 0.25 0.05 0.70 0.05 3.50 0.05 3.50 0.05 lga 16 0317 rev b tray pin 1 bevel package in tray loading orientation component pin ?a1? ltxxxxx 0.375 0.375 detail a ddd z 16 symbol a a1 l b d e d1 e1 e h1 h2 aaa bbb ccc ddd eee fff min 0.85 0.01 0.30 0.22 nom 0.94 0.02 0.40 0.25 3.00 3.00 1.45 1.45 0.50 0.24 0.70 max 1.03 0.03 0.50 0.28 0.10 0.10 0.10 0.10 0.15 0.08 notes dimensions z a1 detail c notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters 3. primary datum -z- is seating plane metal features under the solder mask opening not shown so as not to obscure these terminals and heat features 5 4 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature 6 the exposed heat feature may have optional corner radii 7 corner support pad chamfer is optional e l e/2 1.45 1.45 0.375 0.375 LT8609S 8609sf for more information www.linear.com/LT8609S
24 ? linear technology corporation 2017 lt 0517 ? printed in usa www.linear.com/LT8609S r ela t e d p ar t s typical a pplica t ion part number description comments lt8606 42v, 350ma, 92% efficiency, 2.2mhz synchronous step-down dc/dc converter v in ?=?3.0v to?42v, v out(min) ?=?0.778v, i q ?=?3a, i sd ?LT8609S 8609sf for more information www.linear.com/LT8609S r7 768k r8 100k c12 1f v in en/uv sync LT8609S intv cc tr/ss rt c8 4.7f gnd fb pg sw power good f sw = 2mhz c2 4.7f c3 1f c4 47f c5 10pf r9 10k l1 2.2h r1 18.2k r2 1m r3 309k r4 100k c6 10nf v in en/uv LT8609S intv cc r10 31.6k tr/ss rt gnd fb pg sw v in 3.8v to 20v (42v transient) power good f sw = 2mhz sync c10 47f c11 10pf l2 2.2h r5 18.2k r6 1m

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